Salka Elmadani
ec36668cf5
Better output from the same model. Fused computation, adaptive precision, surgical expert loading. 305 KB, 19 backends, zero dependencies. https://inference-x.com
69 lines
2.4 KiB
C
69 lines
2.4 KiB
C
// ═══════════════════════════════════════════════════════════════════════════════
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// INFERENCE-X — CPU AVX-512 Q4_K Backend
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// Copyright (C) 2025-2026 Salka Elmadani. All rights reserved.
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// BSL-1.1 | Morocco
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// ═══════════════════════════════════════════════════════════════════════════════
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#include "q4_types.h"
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#include <string.h>
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#ifdef __AVX512F__
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#include <immintrin.h>
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#endif
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#define IX_BACKEND_ID "Inference-X-CPU-AVX512"
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// Dequantize Q4_K block to FP32 — correct f16 decoding
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static void dequantize_q4_K_block(const block_q4_K *x, float *y) {
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const uint8_t *q = x->qs;
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float d = f16_to_float(x->d);
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float dmin = f16_to_float(x->dmin);
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int is = 0;
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for (int j = 0; j < QK_K; j += 64) {
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uint8_t sc, m;
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get_scale_min_k4(is + 0, x->scales, &sc, &m);
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float d1 = d * sc, m1 = dmin * m;
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get_scale_min_k4(is + 1, x->scales, &sc, &m);
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float d2 = d * sc, m2 = dmin * m;
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for (int l = 0; l < 32; ++l) *y++ = d1 * (q[l] & 0xF) - m1;
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for (int l = 0; l < 32; ++l) *y++ = d2 * (q[l] >> 4) - m2;
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q += 32; is += 2;
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}
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}
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// Q4_K matmul: out[M] = W[M,K] @ x[K] where W is Q4_K quantized
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void gemm_q4_K_fp32_cpu(
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const void *W_raw,
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const float *x,
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float *out,
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int M, int K)
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{
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const int nb = K / QK_K;
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const block_q4_K *W = (const block_q4_K *)W_raw;
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#pragma omp parallel for schedule(static)
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for (int m = 0; m < M; m++) {
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float y_buf[QK_K];
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float sum = 0.0f;
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for (int kb = 0; kb < nb; kb++) {
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dequantize_q4_K_block(&W[m * nb + kb], y_buf);
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const float *xb = x + kb * QK_K;
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#ifdef __AVX512F__
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__m512 acc = _mm512_setzero_ps();
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for (int i = 0; i < QK_K; i += 16) {
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__m512 vq = _mm512_loadu_ps(y_buf + i);
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__m512 vx = _mm512_loadu_ps(xb + i);
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acc = _mm512_fmadd_ps(vq, vx, acc);
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}
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sum += _mm512_reduce_add_ps(acc);
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#else
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for (int i = 0; i < QK_K; ++i)
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sum += y_buf[i] * xb[i];
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#endif
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}
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out[m] = sum;
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}
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}
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